945139e328
Clean up some formatting
7 years ago
9c235ef821
[HAL]Add support for ST7920 - Teensy 3.x ( #10872 )
7 years ago
7b9f0302d4
Fix Bresenham rounding errors, add link to article ( #10871 )
7 years ago
2566342979
Adjust some commentary
7 years ago
1b200f3312
Sanity check SWITCHING_EXTRUDER with SINGLENOZZLE
7 years ago
6775a16c97
Fix switching extruder stepping with LA
7 years ago
2e139fe50f
Tweak configuration spacing
7 years ago
931ab4ec40
Rename Junction Deviation options
7 years ago
aaaf09bda2
BEZIER_JERK_CONTROL => S_CURVE_ACCELERATION
7 years ago
cf7d5a642a
Fix manual moves for switching tools ( #10868 )
7 years ago
1da2c4f1c1
Text LCD display routine fix. Coauthored with @MagoKimbra ( #10864 )
7 years ago
1c0ad8bbae
wrong type of exit method
7 years ago
01d37e00af
Fix up stepper ISR with linear advance timing ( #10853 )
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Co-Authored-By: ejtagle <ejtagle@hotmail.com>
7 years ago
6f330f397e
[2.0.x] Buffer overflow and scroll fix, UTF8 cleanup ( #10844 )
7 years ago
235facd545
install AVRDUDE 5.10, faster disk find for LPC1768 ( #10849 )
7 years ago
645df23eb0
Fix warning with FASTER_GCODE_PARSER disabled
7 years ago
d74e333c0f
Make sure FAN_ANIM_FRAMES is defined
7 years ago
e2db509d58
[2.0.x] Update/Fix LPC1768 extra script upload_extra_script.py ( #10843 )
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* Use a different method to find the volume info in Windows
7 years ago
7261f48872
Fix reset of endstops and move state
7 years ago
50fa8e01c1
Minor optimization of axis_did_move bits
7 years ago
a94506ada0
Fix K8400 Y min pos, M118 comment
7 years ago
336a022529
Support Malyan LCD without SD
7 years ago
f28e366b77
Followup for core endstops
7 years ago
8b44745bc7
Clean up and consolidate SD-related code ( #10831 )
7 years ago
9644d56b42
Patches for core motion tests
7 years ago
5f8591528e
Remove #pragmas that don't help c files
7 years ago
230ae6a143
Default G30 to engage / disengage
7 years ago
3e3789da85
Regression: Endstops Core compatibility ( #10823 )
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Co-Authored-By: ejtagle <ejtagle@hotmail.com>
7 years ago
c89649b46e
Suppress U8glib build warnings
7 years ago
bbd09a99f1
32 bit boards classification cleanup ( #10818 )
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- Ordering and match classification between `boards.h` and `pins.h`
- Check `pins.h` environments
7 years ago
ee333f6be2
Followup to endstops tweaks
7 years ago
d98bc71af7
Boards classification arrangement ( #10814 )
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STM32 ARM Cortex-M3 boards were listed as M4
7 years ago
4b610b333e
Tweak G38 formatting
7 years ago
d2647c1f19
Fix G1 behaviour after tool unpark
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Fix #10777 for 2.0.x
Co-Authored-By: Ante Vukorepa <o.orcinus@gmail.com>
7 years ago
3bb950c69a
Fix DEBUG_LEVELING_FEATURE for MBL
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As noted in #10777
7 years ago
1af98519cd
Group and adjust LCD buttons code
7 years ago
0c3773d724
Cleanup in stepper_indirection.h
7 years ago
4118199ddd
Tweaks to core headers
7 years ago
4b2f6e3b2b
[2.0.x] Add endstop noise filter ( #10796 )
7 years ago
65a004564c
Stepper::set_position needed for some applications
7 years ago
435ecb6b67
Followup to stepper/planner refactor
7 years ago
6dfbb39f83
[LPC1768] Add error-handling to upload script, update autobuild.py ( #10802 )
7 years ago
68d7fcec83
Simplify and fix Z fade height edit
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Fix #10761
7 years ago
d557c84a71
[2.0.x] Error for FAST_PWM_FAN with 32 bit CPU ( #10798 )
7 years ago
569df3fc0c
Fix interrupt-based endstop detection
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- Also implemented real endstop reading on interrupt.
7 years ago
a4af975873
Fix planner block optimization
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- Fixed the planner incorrectly avoiding optimization of the block following the active one.
- Added extra conditions to terminate planner early and avoid redundant computations.
7 years ago
e0ca627033
Planner block HOLD flag
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Allows the Stepper ISR to wait until a given block is free for use. Allows Planner to plan the first move, which is split into two.
7 years ago
a11eb50a3e
Refactor and optimize Stepper/Planner
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Better encapsulation and considerably reduce stepper jitter
7 years ago
0566badcef
Add memory barrier, optimal interrupt on-off
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Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/ )
7 years ago
c2fb2f54a1
Use assembly for AVR ISR vectors
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Co-Authored-By: ejtagle <ejtagle@hotmail.com>
7 years ago
Scott Lahteine