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Drop 'register' storage specifier

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2.0.x
Scott Lahteine 6 years ago
parent c04cf127f7
commit e0956bb572
6 changed files with 63 additions and 63 deletions
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10
Marlin/src/HAL/HAL_AVR/math_AVR.h
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@ -36,9 +36,9 @@
// D C B A is longIn2
//
static FORCE_INLINE uint16_t MultiU24X32toH16(uint32_t longIn1, uint32_t longIn2) {
register uint8_t tmp1;
register uint8_t tmp2;
register uint16_t intRes;
uint8_t tmp1;
uint8_t tmp2;
uint16_t intRes;
__asm__ __volatile__(
A("clr %[tmp1]")
A("mul %A[longIn1], %B[longIn2]")
@ -90,8 +90,8 @@ static FORCE_INLINE uint16_t MultiU24X32toH16(uint32_t longIn1, uint32_t longIn2
// r26 to store 0
// r27 to store the byte 1 of the 24 bit result
static FORCE_INLINE uint16_t MultiU16X8toH16(uint8_t charIn1, uint16_t intIn2) {
register uint8_t tmp;
register uint16_t intRes;
uint8_t tmp;
uint16_t intRes;
__asm__ __volatile__ (
A("clr %[tmp]")
A("mul %[charIn1], %B[intIn2]")

42
Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp
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@ -78,11 +78,11 @@
// run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
static uint8_t spiTransferTx0(uint8_t bout) { // using Mode 0
register uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
register uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
register uint32_t idx = 0;
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t idx = 0;
/* Negate bout, as the assembler requires a negated value */
bout = ~bout;
@ -161,11 +161,11 @@
// run at ~8 .. ~10Mhz - Rx version (Tx line not altered)
static uint8_t spiTransferRx0(uint8_t bout) { // using Mode 0
register uint32_t bin = 0;
register uint32_t work = 0;
register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t bin = 0;
uint32_t work = 0;
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
UNUSED(bout);
/* The software SPI routine */
@ -281,12 +281,12 @@
// Block transfers run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
static void spiTxBlock0(const uint8_t* ptr, uint32_t todo) {
register uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
register uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
register uint32_t work = 0;
register uint32_t txval = 0;
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t work = 0;
uint32_t txval = 0;
/* The software SPI routine */
__asm__ __volatile__(
@ -360,11 +360,11 @@
}
static void spiRxBlock0(uint8_t* ptr, uint32_t todo) {
register uint32_t bin = 0;
register uint32_t work = 0;
register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t bin = 0;
uint32_t work = 0;
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
/* The software SPI routine */
__asm__ __volatile__(

4
Marlin/src/HAL/HAL_LPC1768/u8g/u8g_com_HAL_LPC1768_ssd_hw_i2c.cpp
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@ -156,7 +156,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
return 0;
}
register uint8_t *ptr = (uint8_t *)arg_ptr;
uint8_t *ptr = (uint8_t *)arg_ptr;
while (arg_val > 0) {
if (u8g_i2c_send_byte(*ptr++) == 0) {
u8g_i2c_stop();
@ -175,7 +175,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
return 0;
}
register uint8_t *ptr = (uint8_t *)arg_ptr;
uint8_t *ptr = (uint8_t *)arg_ptr;
while (arg_val > 0) {
if (u8g_i2c_send_byte(u8g_pgm_read(ptr)) == 0)
return 0;

4
Marlin/src/HAL/HAL_LPC1768/u8g/u8g_com_HAL_LPC1768_ssd_sw_i2c.cpp under construction
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@ -214,7 +214,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
return u8g_i2c_stop_sw(), 0;
register uint8_t *ptr = (uint8_t *)arg_ptr;
uint8_t *ptr = (uint8_t *)arg_ptr;
while (arg_val > 0) {
if (u8g_i2c_send_byte_sw(*ptr++) == 0)
return u8g_i2c_stop_sw(), 0;
@ -229,7 +229,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
return u8g_i2c_stop_sw(), 0;
register uint8_t *ptr = (uint8_t *)arg_ptr;
uint8_t *ptr = (uint8_t *)arg_ptr;
while (arg_val > 0) {
if (u8g_i2c_send_byte_sw(u8g_pgm_read(ptr)) == 0) return 0;
ptr++;

10
Marlin/src/module/planner.cpp
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@ -355,11 +355,11 @@ void Planner::init() {
// For small divisors, it is best to directly retrieve the results
if (d <= 110) return pgm_read_dword(&small_inv_tab[d]);
register uint8_t r8 = d & 0xFF,
r9 = (d >> 8) & 0xFF,
r10 = (d >> 16) & 0xFF,
r2,r3,r4,r5,r6,r7,r11,r12,r13,r14,r15,r16,r17,r18;
register const uint8_t* ptab = inv_tab;
uint8_t r8 = d & 0xFF,
r9 = (d >> 8) & 0xFF,
r10 = (d >> 16) & 0xFF,
r2,r3,r4,r5,r6,r7,r11,r12,r13,r14,r15,r16,r17,r18;
const uint8_t* ptab = inv_tab;
__asm__ __volatile__(
// %8:%7:%6 = interval

56
Marlin/src/module/stepper.cpp
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@ -498,14 +498,14 @@ void Stepper::set_directions() {
* rhi = int32_t((mul >> 32) & 0xFFFFFFFF);
* }
* int32_t _eval_bezier_curve_arm(uint32_t curr_step) {
* register uint32_t flo = 0;
* register uint32_t fhi = bezier_AV * curr_step;
* register uint32_t t = fhi;
* register int32_t alo = bezier_F;
* register int32_t ahi = 0;
* register int32_t A = bezier_A;
* register int32_t B = bezier_B;
* register int32_t C = bezier_C;
* uint32_t flo = 0;
* uint32_t fhi = bezier_AV * curr_step;
* uint32_t t = fhi;
* int32_t alo = bezier_F;
* int32_t ahi = 0;
* int32_t A = bezier_A;
* int32_t B = bezier_B;
* int32_t C = bezier_C;
*
* lsrs(ahi, alo, 1); // a = F << 31
* lsls(alo, alo, 31); //
@ -630,13 +630,13 @@ void Stepper::set_directions() {
bezier_AV = av;
// Calculate the rest of the coefficients
register uint8_t r2 = v0 & 0xFF;
register uint8_t r3 = (v0 >> 8) & 0xFF;
register uint8_t r12 = (v0 >> 16) & 0xFF;
register uint8_t r5 = v1 & 0xFF;
register uint8_t r6 = (v1 >> 8) & 0xFF;
register uint8_t r7 = (v1 >> 16) & 0xFF;
register uint8_t r4,r8,r9,r10,r11;
uint8_t r2 = v0 & 0xFF;
uint8_t r3 = (v0 >> 8) & 0xFF;
uint8_t r12 = (v0 >> 16) & 0xFF;
uint8_t r5 = v1 & 0xFF;
uint8_t r6 = (v1 >> 8) & 0xFF;
uint8_t r7 = (v1 >> 16) & 0xFF;
uint8_t r4,r8,r9,r10,r11;
__asm__ __volatile__(
/* Calculate the Bézier coefficients */
@ -732,11 +732,11 @@ void Stepper::set_directions() {
if (!curr_step)
return bezier_F;
register uint8_t r0 = 0; /* Zero register */
register uint8_t r2 = (curr_step) & 0xFF;
register uint8_t r3 = (curr_step >> 8) & 0xFF;
register uint8_t r4 = (curr_step >> 16) & 0xFF;
register uint8_t r1,r5,r6,r7,r8,r9,r10,r11; /* Temporary registers */
uint8_t r0 = 0; /* Zero register */
uint8_t r2 = (curr_step) & 0xFF;
uint8_t r3 = (curr_step >> 8) & 0xFF;
uint8_t r4 = (curr_step >> 16) & 0xFF;
uint8_t r1,r5,r6,r7,r8,r9,r10,r11; /* Temporary registers */
__asm__ __volatile(
/* umul24x24to16hi(t, bezier_AV, curr_step); t: Range 0 - 1^16 = 16 bits*/
@ -1127,14 +1127,14 @@ void Stepper::set_directions() {
#if defined(__ARM__) || defined(__thumb__)
// For ARM Cortex M3/M4 CPUs, we have the optimized assembler version, that takes 43 cycles to execute
register uint32_t flo = 0;
register uint32_t fhi = bezier_AV * curr_step;
register uint32_t t = fhi;
register int32_t alo = bezier_F;
register int32_t ahi = 0;
register int32_t A = bezier_A;
register int32_t B = bezier_B;
register int32_t C = bezier_C;
uint32_t flo = 0;
uint32_t fhi = bezier_AV * curr_step;
uint32_t t = fhi;
int32_t alo = bezier_F;
int32_t ahi = 0;
int32_t A = bezier_A;
int32_t B = bezier_B;
int32_t C = bezier_C;
__asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax

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