// Take care, as this requires the correct order of operation, with interrupts disabled.
// Take care, as this requires the correct order of operation, with interrupts disabled.
// See the datasheet of any AVR chip for details.
// See the datasheet of any AVR chip for details.
wdt_reset();
wdt_reset();
cli();
_WD_CONTROL_REG=_BV(_WD_CHANGE_BIT)|_BV(WDE);
_WD_CONTROL_REG=_BV(_WD_CHANGE_BIT)|_BV(WDE);
_WD_CONTROL_REG=_BV(WDIE)|WDTO_NS;
_WD_CONTROL_REG=_BV(WDIE)|(WDTO_NS&0x07)|((WDTO_NS&0x08)<<2);// WDTO_NS directly does not work. bit 0-2 are consecutive in the register but the highest value bit is at bit 5
// So worked for up to WDTO_2S
sei();
wdt_reset();
#else
#else
wdt_enable(WDTO_NS);
wdt_enable(WDTO_NS);// The function handles the upper bit correct.