Followup to HAL optimizations and delays

- Cleanups, fixes for Due HAL code.
- TC_IER is write-only. Use TC_IMR to test ISR state.
2.0.x
etagle 7 years ago committed by Scott Lahteine
parent 8f8c6a9bc4
commit 9d98a62699

@ -33,6 +33,8 @@
#ifndef MARLIN_DELAY_H #ifndef MARLIN_DELAY_H
#define MARLIN_DELAY_H #define MARLIN_DELAY_H
#include "../core/macros.h"
#if defined(__arm__) || defined(__thumb__) #if defined(__arm__) || defined(__thumb__)
/* https://blueprints.launchpad.net/gcc-arm-embedded/+spec/delay-cycles */ /* https://blueprints.launchpad.net/gcc-arm-embedded/+spec/delay-cycles */

@ -89,7 +89,7 @@
/* The software SPI routine */ /* The software SPI routine */
__asm__ __volatile__( __asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax A(".syntax unified") // is to prevent CM0,CM1 non-unified syntax
/* Bit 7 */ /* Bit 7 */
A("ubfx %[idx],%[txval],#7,#1") /* Place bit 7 in bit 0 of idx*/ A("ubfx %[idx],%[txval],#7,#1") /* Place bit 7 in bit 0 of idx*/
@ -170,7 +170,7 @@
/* The software SPI routine */ /* The software SPI routine */
__asm__ __volatile__( __asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax A(".syntax unified") // is to prevent CM0,CM1 non-unified syntax
/* bit 7 */ /* bit 7 */
A("str %[sck_mask],[%[sck_port]]") /* SODR */ A("str %[sck_mask],[%[sck_port]]") /* SODR */
@ -290,7 +290,7 @@
/* The software SPI routine */ /* The software SPI routine */
__asm__ __volatile__( __asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax A(".syntax unified") // is to prevent CM0,CM1 non-unified syntax
L("loop%=") L("loop%=")
A("ldrb.w %[txval], [%[ptr]], #1") /* Load value to send, increment buffer */ A("ldrb.w %[txval], [%[ptr]], #1") /* Load value to send, increment buffer */
@ -368,7 +368,7 @@
/* The software SPI routine */ /* The software SPI routine */
__asm__ __volatile__( __asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax A(".syntax unified") // is to prevent CM0,CM1 non-unified syntax
L("loop%=") L("loop%=")

@ -137,19 +137,7 @@ void HAL_timer_disable_interrupt(const uint8_t timer_num) {
bool HAL_timer_interrupt_enabled(const uint8_t timer_num) { bool HAL_timer_interrupt_enabled(const uint8_t timer_num) {
const tTimerConfig * const pConfig = &TimerConfig[timer_num]; const tTimerConfig * const pConfig = &TimerConfig[timer_num];
return pConfig->pTimerRegs->TC_CHANNEL[pConfig->channel].TC_IER == TC_IER_CPCS; return (pConfig->pTimerRegs->TC_CHANNEL[pConfig->channel].TC_IMR & TC_IMR_CPCS) != 0;
} }
#if 0
void HAL_timer_set_compare(const uint8_t timer_num, const uint32_t compare) {
const tTimerConfig * const pConfig = &TimerConfig[timer_num];
TC_SetRC(pConfig->pTimerRegs, pConfig->channel, compare);
}
void HAL_timer_isr_prologue(const uint8_t timer_num) {
const tTimerConfig * const pConfig = &TimerConfig[timer_num];
TC_GetStatus(pConfig->pTimerRegs, pConfig->channel);
}
#endif
#endif // ARDUINO_ARCH_SAM #endif // ARDUINO_ARCH_SAM

@ -58,6 +58,7 @@
#include <U8glib.h> #include <U8glib.h>
#include <Arduino.h> #include <Arduino.h>
#include "../../core/macros.h" #include "../../core/macros.h"
#include "../Delay.h"
void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) { void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) {
PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1, PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
@ -71,28 +72,6 @@ void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
else port->PIO_CODR = mask; else port->PIO_CODR = mask;
} }
void __delay_4cycles(uint32_t cy) __attribute__ ((weak));
FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
#if ARCH_PIPELINE_RELOAD_CYCLES<2
#define EXTRA_NOP_CYCLES "nop"
#else
#define EXTRA_NOP_CYCLES ""
#endif
__asm__ __volatile__(
".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax
L("loop%=")
A("subs %[cnt],#1")
A(EXTRA_NOP_CYCLES)
A("bne loop%=")
: [cnt]"+r"(cy) // output: +r means input+output
: // input:
: "cc" // clobbers:
);
}
Pio *SCK_pPio, *MOSI_pPio; Pio *SCK_pPio, *MOSI_pPio;
uint32_t SCK_dwMask, MOSI_dwMask; uint32_t SCK_dwMask, MOSI_dwMask;
@ -102,9 +81,9 @@ static void spiSend_sw_DUE(uint8_t val) { // 800KHz
MOSI_pPio->PIO_SODR = MOSI_dwMask; MOSI_pPio->PIO_SODR = MOSI_dwMask;
else else
MOSI_pPio->PIO_CODR = MOSI_dwMask; MOSI_pPio->PIO_CODR = MOSI_dwMask;
__delay_4cycles(1); DELAY_NS(48);
SCK_pPio->PIO_SODR = SCK_dwMask; SCK_pPio->PIO_SODR = SCK_dwMask;
__delay_4cycles(19); // 16 dead, 17 garbage, 18/0 900kHz, 19/1 825k, 20/1 800k, 21/2 725KHz DELAY_NS(905); // 762 dead, 810 garbage, 858/0 900kHz, 905/1 825k, 953/1 800k, 1000/2 725KHz
val <<= 1; val <<= 1;
SCK_pPio->PIO_CODR = SCK_dwMask; SCK_pPio->PIO_CODR = SCK_dwMask;
} }
@ -125,8 +104,7 @@ static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
/* data */ /* data */
spiSend_sw_DUE(0x0FA); spiSend_sw_DUE(0x0FA);
for (i = 0; i < 4; i++) // give the controller some time to process the data DELAY_US(40); // give the controller some time to process the data: 20 is bad, 30 is OK, 40 is safe
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
} }
spiSend_sw_DUE(val & 0x0F0); spiSend_sw_DUE(val & 0x0F0);

@ -60,6 +60,7 @@
//#include "Configuration.h" //#include "Configuration.h"
#include <U8glib.h> #include <U8glib.h>
#include "../Delay.h"
#define SPI_FULL_SPEED 0 #define SPI_FULL_SPEED 0
#define SPI_HALF_SPEED 1 #define SPI_HALF_SPEED 1
@ -92,8 +93,7 @@
/* data */ /* data */
spiSend(0x0FA); spiSend(0x0FA);
for( i = 0; i < 4; i++ ) // give the controller some time to process the data DELAY_US(40); // give the controller some time to process the data: 20 is bad, 30 is OK, 40 is safe
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
} }
spiSend(val & 0x0F0); spiSend(val & 0x0F0);

@ -57,6 +57,7 @@
#include <U8glib.h> #include <U8glib.h>
#include "SoftwareSPI.h" #include "SoftwareSPI.h"
#include "../Delay.h"
#define SPI_SPEED 3 // About 1 MHz #define SPI_SPEED 3 // About 1 MHz
@ -78,8 +79,7 @@
/* data */ /* data */
swSpiTransfer(0x0FA, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); swSpiTransfer(0x0FA, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
for( i = 0; i < 4; i++ ) // give the controller some time to process the data DELAY_US(40); // give the controller some time to process the data: 20 is bad, 30 is OK, 40 is safe
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
} }
swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);

@ -105,7 +105,7 @@ static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
#if DOGM_SPI_DELAY_US > 0 #if DOGM_SPI_DELAY_US > 0
#define U8G_DELAY() DELAY_US(DOGM_SPI_DELAY_US) #define U8G_DELAY() DELAY_US(DOGM_SPI_DELAY_US)
#else #else
#define U8G_DELAY() u8g_10MicroDelay() #define U8G_DELAY() DELAY_US(10)
#endif #endif
#define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); } #define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); }

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