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@ -27,17 +27,11 @@
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#if ENABLED(U8GLIB_ST7565_64128N)
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#define ST7565_CLK_PIN DOGLCD_SCK
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#define ST7565_DAT_PIN DOGLCD_MOSI
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#define ST7565_CS_PIN DOGLCD_CS
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#define ST7565_A0_PIN DOGLCD_A0
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#include <U8glib.h>
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#define WIDTH 128
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@ -92,7 +86,6 @@
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#define ST7565_DELAY_3 CPU_ST7565_DELAY_3
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#endif
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#if ENABLED(SHARED_SPI) // Re-ARM requires that the LCD and the SD card share a single SPI
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#define ST7565_WRITE_BYTE(a) { spiSend((uint8_t)a); U8G_DELAY; }
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@ -135,8 +128,7 @@
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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switch (msg) {
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case U8G_DEV_MSG_INIT:
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{
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case U8G_DEV_MSG_INIT: {
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OUT_WRITE(ST7565_CS_PIN, LOW);
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#if ENABLED(SHARED_SPI)
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u8g_Delay(250);
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@ -155,52 +147,50 @@ uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x0A2); /* 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
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ST7565_WRITE_BYTE(0x0A2); /* 0x0A2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
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ST7565_WRITE_BYTE(0x0A0); /* Normal ADC Select (according to Displaytech 64128N datasheet) */
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ST7565_WRITE_BYTE(0x0c8); /* common output mode: set scan direction normal operation/SHL Select; 0x0c0 --> SHL = 0; normal; 0x0c8 --> SHL = 1 */
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ST7565_WRITE_BYTE(0x0C8); /* common output mode: set scan direction normal operation/SHL Select; 0x0C0 --> SHL = 0; normal; 0x0C8 --> SHL = 1 */
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ST7565_WRITE_BYTE(0x040); /* Display start line for Displaytech 64128N */
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ST7565_WRITE_BYTE(0x028 | 0x04); /* power control: turn on voltage converter */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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//U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0x028 | 0x06); /* power control: turn on voltage regulator */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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//U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0x028 | 0x07); /* power control: turn on voltage follower */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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//U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0x010); /* Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N */
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ST7565_WRITE_BYTE(0x0a6); /* display normal, bit val 0: LCD pixel off. */
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ST7565_WRITE_BYTE(0x0A6); /* display normal, bit val 0: LCD pixel off. */
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ST7565_WRITE_BYTE(0x081); /* set contrast */
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ST7565_WRITE_BYTE(0x01e); /* Contrast value. Setting for controlling brightness of Displaytech 64128N */
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ST7565_WRITE_BYTE(0x01E); /* Contrast value. Setting for controlling brightness of Displaytech 64128N */
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ST7565_WRITE_BYTE(0x0af); /* display on */
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ST7565_WRITE_BYTE(0x0AF); /* display on */
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U8G_ESC_DLY(100); /* delay 100 ms */
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ST7565_WRITE_BYTE(0x0a5); /* display all points; ST7565 */
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ST7565_WRITE_BYTE(0x0A5); /* display all points; ST7565 */
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U8G_ESC_DLY(100); /* delay 100 ms */
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U8G_ESC_DLY(100); /* delay 100 ms */
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ST7565_WRITE_BYTE(0x0a4); /* normal display */
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ST7565_WRITE_BYTE(0x0A4); /* normal display */
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ST7565_CS(); /* disable chip */
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} /* end of sequence */
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{ u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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break;
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case U8G_DEV_MSG_STOP: break;
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case U8G_DEV_MSG_PAGE_NEXT: {
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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ST7565_CS(); /* disable chip */
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
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ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
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/* end of sequence */
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ST7565_WRITE_BYTE(0x0b0 | (2*pb->p.page));; /* select current page (ST7565R) */
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ST7565_WRITE_BYTE(0x0B0 | (2*pb->p.page));; /* select current page (ST7565R) */
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ST7565_A0(); /* data mode */
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ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)pb->buf);
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ST7565_CS(); /* disable chip */
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@ -209,12 +199,13 @@ uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg
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ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
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ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
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/* end of sequence */
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ST7565_WRITE_BYTE(0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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ST7565_WRITE_BYTE(0x0B0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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ST7565_A0(); /* data mode */
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ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)(pb->buf)+pb->width);
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ST7565_CS(); /* disable chip */
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}
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break;
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break;
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case U8G_DEV_MSG_CONTRAST:
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ST7565_NCS();
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ST7565_NA0(); /* instruction mode */
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@ -222,21 +213,23 @@ uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg
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ST7565_WRITE_BYTE((*(uint8_t *)arg) >> 2);
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ST7565_CS(); /* disable chip */
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return 1;
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case U8G_DEV_MSG_SLEEP_ON:
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x0ac); /* static indicator off */
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ST7565_WRITE_BYTE(0x0AC); /* static indicator off */
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ST7565_WRITE_BYTE(0x000); /* indicator register set (not sure if this is required) */
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ST7565_WRITE_BYTE(0x0ae); /* display off */
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ST7565_WRITE_BYTE(0x0a5); /* all points on */
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ST7565_WRITE_BYTE(0x0AE); /* display off */
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ST7565_WRITE_BYTE(0x0A5); /* all points on */
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ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
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/* end of sequence */
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return 1;
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case U8G_DEV_MSG_SLEEP_OFF:
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x0a4); /* all points off */
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ST7565_WRITE_BYTE(0x0af); /* display on */
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ST7565_WRITE_BYTE(0x0A4); /* all points off */
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ST7565_WRITE_BYTE(0x0AF); /* display on */
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U8G_ESC_DLY(50); /* delay 50 ms */
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ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
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/* end of sequence */
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@ -260,8 +253,6 @@ class U8GLIB_ST7565_64128n_2x_VIKI : public U8GLIB {
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{ }
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};
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#pragma GCC reset_options
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#endif // U8GLIB_ST7565
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Scott Lahteine
7 years ago
committed by