|
|
@ -18,30 +18,27 @@
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
// adapted from I2C/master/master.c example
|
|
|
|
// adapted from I2C/master/master.c example
|
|
|
|
// https://www-users.cs.york.ac.uk/~pcc/MCP/HAPR-Course-web/CMSIS/examples/html/master_8c_source.html
|
|
|
|
// https://www-users.cs.york.ac.uk/~pcc/MCP/HAPR-Course-web/CMSIS/examples/html/master_8c_source.html
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef TARGET_LPC1768
|
|
|
|
#ifdef TARGET_LPC1768
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C" {
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
#include <lpc17xx_i2c.h>
|
|
|
|
#include <lpc17xx_i2c.h>
|
|
|
|
#include <lpc17xx_pinsel.h>
|
|
|
|
#include <lpc17xx_pinsel.h>
|
|
|
|
#include <lpc17xx_libcfg_default.h>
|
|
|
|
#include <lpc17xx_libcfg_default.h>
|
|
|
|
|
|
|
|
|
|
|
|
//////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
//////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
|
|
// These two routines are exact copies of the lpc17xx_i2c.c routines. Couldn't link to
|
|
|
|
// These two routines are exact copies of the lpc17xx_i2c.c routines. Couldn't link to
|
|
|
|
// to the lpc17xx_i2c.c routines so had to copy them into this file & rename them.
|
|
|
|
// to the lpc17xx_i2c.c routines so had to copy them into this file & rename them.
|
|
|
|
|
|
|
|
|
|
|
|
static uint32_t _I2C_Start (LPC_I2C_TypeDef *I2Cx)
|
|
|
|
static uint32_t _I2C_Start (LPC_I2C_TypeDef *I2Cx) {
|
|
|
|
{
|
|
|
|
|
|
|
|
// Reset STA, STO, SI
|
|
|
|
// Reset STA, STO, SI
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
|
|
|
|
|
|
|
|
|
|
|
@ -52,46 +49,41 @@
|
|
|
|
while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
|
|
|
|
while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
|
|
|
|
return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
|
|
|
|
return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void _I2C_Stop (LPC_I2C_TypeDef *I2Cx)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void _I2C_Stop (LPC_I2C_TypeDef *I2Cx) {
|
|
|
|
/* Make sure start bit is not active */
|
|
|
|
/* Make sure start bit is not active */
|
|
|
|
if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
|
|
|
|
if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
|
|
|
|
{
|
|
|
|
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
I2Cx->I2CONSET = I2C_I2CONSET_STO|I2C_I2CONSET_AA;
|
|
|
|
I2Cx->I2CONSET = I2C_I2CONSET_STO|I2C_I2CONSET_AA;
|
|
|
|
|
|
|
|
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
|
|
|
|
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
//////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define USEDI2CDEV_M 1 // use I2C1 controller
|
|
|
|
#define USEDI2CDEV_M 1 // use I2C1 controller
|
|
|
|
|
|
|
|
|
|
|
|
#if (USEDI2CDEV_M == 0)
|
|
|
|
#if (USEDI2CDEV_M == 0)
|
|
|
|
#define I2CDEV_M LPC_I2C0
|
|
|
|
#define I2CDEV_M LPC_I2C0
|
|
|
|
#elif (USEDI2CDEV_M == 1)
|
|
|
|
#elif (USEDI2CDEV_M == 1)
|
|
|
|
#define I2CDEV_M LPC_I2C1
|
|
|
|
#define I2CDEV_M LPC_I2C1
|
|
|
|
#elif (USEDI2CDEV_M == 2)
|
|
|
|
#elif (USEDI2CDEV_M == 2)
|
|
|
|
#define I2CDEV_M LPC_I2C2
|
|
|
|
#define I2CDEV_M LPC_I2C2
|
|
|
|
#else
|
|
|
|
#else
|
|
|
|
#error "Master I2C device not defined!"
|
|
|
|
#error "Master I2C device not defined!"
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PINSEL_CFG_Type PinCfg;
|
|
|
|
PINSEL_CFG_Type PinCfg;
|
|
|
|
I2C_M_SETUP_Type transferMCfg;
|
|
|
|
I2C_M_SETUP_Type transferMCfg;
|
|
|
|
|
|
|
|
|
|
|
|
#define I2C_status (LPC_I2C1->I2STAT & I2C_STAT_CODE_BITMASK)
|
|
|
|
#define I2C_status (LPC_I2C1->I2STAT & I2C_STAT_CODE_BITMASK)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
uint8_t digipot_mcp4451_start(uint8_t sla) { // send slave address and write bit
|
|
|
|
uint8_t digipot_mcp4451_start(uint8_t sla) { // send slave address and write bit
|
|
|
|
// Sometimes TX data ACK or NAK status is returned. That mean the start state didn't
|
|
|
|
// Sometimes TX data ACK or NAK status is returned. That mean the start state didn't
|
|
|
|
// happen which means only the value of the slave address was send. Keep looping until
|
|
|
|
// happen which means only the value of the slave address was send. Keep looping until
|
|
|
|
// the slave address and write bit are actually sent.
|
|
|
|
// the slave address and write bit are actually sent.
|
|
|
@ -113,12 +105,12 @@
|
|
|
|
&& (I2C_status != I2C_I2STAT_M_TX_DAT_NACK)); //wait for slaw to finish
|
|
|
|
&& (I2C_status != I2C_I2STAT_M_TX_DAT_NACK)); //wait for slaw to finish
|
|
|
|
}while ( (I2C_status == I2C_I2STAT_M_TX_DAT_ACK) || (I2C_status == I2C_I2STAT_M_TX_DAT_NACK));
|
|
|
|
}while ( (I2C_status == I2C_I2STAT_M_TX_DAT_ACK) || (I2C_status == I2C_I2STAT_M_TX_DAT_NACK));
|
|
|
|
return 1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void digipot_mcp4451_init(void) {
|
|
|
|
void digipot_mcp4451_init(void) {
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
/**
|
|
|
|
* Init I2C pin connect
|
|
|
|
* Init I2C pin connect
|
|
|
|
*/
|
|
|
|
*/
|
|
|
|
PinCfg.OpenDrain = 0;
|
|
|
|
PinCfg.OpenDrain = 0;
|
|
|
@ -152,20 +144,19 @@
|
|
|
|
|
|
|
|
|
|
|
|
/* Enable Master I2C operation */
|
|
|
|
/* Enable Master I2C operation */
|
|
|
|
I2C_Cmd(I2CDEV_M, I2C_MASTER_MODE, ENABLE);
|
|
|
|
I2C_Cmd(I2CDEV_M, I2C_MASTER_MODE, ENABLE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
uint8_t digipot_mcp4451_send_byte(uint8_t data) {
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
uint8_t digipot_mcp4451_send_byte(uint8_t data) {
|
|
|
|
LPC_I2C1->I2DAT = data & I2C_I2DAT_BITMASK; // transmit data
|
|
|
|
LPC_I2C1->I2DAT = data & I2C_I2DAT_BITMASK; // transmit data
|
|
|
|
LPC_I2C1->I2CONSET = I2C_I2CONSET_AA;
|
|
|
|
LPC_I2C1->I2CONSET = I2C_I2CONSET_AA;
|
|
|
|
LPC_I2C1->I2CONCLR = I2C_I2CONCLR_SIC;
|
|
|
|
LPC_I2C1->I2CONCLR = I2C_I2CONCLR_SIC;
|
|
|
|
while ((I2C_status != I2C_I2STAT_M_TX_DAT_ACK) && (I2C_status != I2C_I2STAT_M_TX_DAT_NACK)); // wait for xmit to finish
|
|
|
|
while ((I2C_status != I2C_I2STAT_M_TX_DAT_ACK) && (I2C_status != I2C_I2STAT_M_TX_DAT_NACK)); // wait for xmit to finish
|
|
|
|
return 1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#endif // TARGET_LPC1768
|
|
|
|