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@ -61,13 +61,11 @@
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#include <Arduino.h>
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#include <Arduino.h>
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#include "../../core/macros.h"
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#include "../../core/macros.h"
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void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) {
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void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) {
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PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
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PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
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g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT
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g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT
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}
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}
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void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
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void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
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volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
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volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
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uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
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uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
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@ -75,7 +73,6 @@
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else port->PIO_CODR = mask;
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else port->PIO_CODR = mask;
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}
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}
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#define nop() __asm__ __volatile__("nop;\n\t":::)
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#define nop() __asm__ __volatile__("nop;\n\t":::)
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void __delay_4cycles(uint32_t cy) __attribute__ ((weak));
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void __delay_4cycles(uint32_t cy) __attribute__ ((weak));
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@ -102,8 +99,7 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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Pio *SCK_pPio, *MOSI_pPio;
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Pio *SCK_pPio, *MOSI_pPio;
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uint32_t SCK_dwMask, MOSI_dwMask;
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uint32_t SCK_dwMask, MOSI_dwMask;
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static void spiSend_sw_DUE(uint8_t val) // 800KHz
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static void spiSend_sw_DUE(uint8_t val) { // 800KHz
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{
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for (uint8_t i = 0; i < 8; i++) {
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for (uint8_t i = 0; i < 8; i++) {
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if (val & 0x80)
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if (val & 0x80)
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MOSI_pPio->PIO_SODR = MOSI_dwMask;
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MOSI_pPio->PIO_SODR = MOSI_dwMask;
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@ -119,8 +115,7 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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static uint8_t rs_last_state = 255;
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static uint8_t rs_last_state = 255;
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static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val)
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static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
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{
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uint8_t i;
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uint8_t i;
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if ( rs != rs_last_state) { // time to send a command/data byte
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if ( rs != rs_last_state) { // time to send a command/data byte
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@ -142,10 +137,8 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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}
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}
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uint8_t u8g_com_HAL_DUE_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
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uint8_t u8g_com_HAL_DUE_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
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{
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switch (msg) {
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switch(msg)
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{
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case U8G_COM_MSG_INIT:
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case U8G_COM_MSG_INIT:
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SCK_pPio = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].pPort;
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SCK_pPio = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].pPort;
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SCK_dwMask = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].ulPin;
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SCK_dwMask = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].ulPin;
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@ -184,22 +177,18 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], arg_val);
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], arg_val);
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break;
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break;
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case U8G_COM_MSG_WRITE_SEQ:
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case U8G_COM_MSG_WRITE_SEQ: {
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{
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uint8_t *ptr = (uint8_t*) arg_ptr;
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uint8_t *ptr = (uint8_t*) arg_ptr;
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while( arg_val > 0 )
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while (arg_val > 0) {
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{
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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arg_val--;
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arg_val--;
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}
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}
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}
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}
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break;
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break;
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case U8G_COM_MSG_WRITE_SEQ_P:
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case U8G_COM_MSG_WRITE_SEQ_P: {
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{
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uint8_t *ptr = (uint8_t*) arg_ptr;
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uint8_t *ptr = (uint8_t*) arg_ptr;
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while( arg_val > 0 )
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while (arg_val > 0) {
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{
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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arg_val--;
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arg_val--;
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}
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}
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@ -208,5 +197,7 @@ FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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}
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}
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return 1;
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return 1;
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}
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}
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#pragma GCC reset_options
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#pragma GCC reset_options
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#endif //ARDUINO_ARCH_SAM
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#endif //ARDUINO_ARCH_SAM
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