STM32 soft SPI. STEVAL_3DP001V1 SD read. M906 tweaks. (#16579)
Bob-the-Kuhn
5 years ago
committed by
Scott Lahteine
parent
91a399ae7f
commit
0d0dfba203
@ -0,0 +1,310 @@
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/*
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*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include "pins_arduino.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(ARDUINO_STEVAL)
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// Pin number
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// This array allows to wrap Arduino pin number(Dx or x)
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// to STM32 PinName (PX_n)
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const PinName digitalPin[] = {
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PA_9, // TX
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PA_10, // RX
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// WIFI
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PD_3, // CTS
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PD_4, // RTS
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PD_5, // TX
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PD_6, // RX
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PB_5, // WIFI_WAKEUP
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PE_11, // WIFI_RESET
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PE_12, // WIFI_BOOT
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// STATUS_LED
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PE_1, //STATUS_LED
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// SPI USER
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PB_12, // SPI_CS
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PB_15, // SPI_MOSI
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PB_14, // SPI_MISO
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PB_13, // SPI_SCK
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// I2C USER
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PB_7, // SDA
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PB_6, // SCL
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// SPI
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PA_4, // SPI_CS
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PA_5, // SPI_SCK
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PA_6, // SPI_MISO
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PA_7, // SPI_MOSI
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// JTAG
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PA_13, // JTAG_TMS/SWDIO
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PA_14, // JTAG_TCK/SWCLK
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PB_3, // JTAG_TDO/SWO
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// SDCARD
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PC_8, // SDIO_D0
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PC_9, // SDIO_D1
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PA_15, // SD_CARD_DETECT
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PC_10, // SDIO_D2
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PC_11, // SDIO_D3
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PC_12, // SDIO_CK
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PD_2, // SDIO_CMD
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// OTG
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PA_11, // OTG_DM
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PA_12, // OTG_DP
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// IR/PROBE
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PD_1, // IR_OUT
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PC_1, // IR_ON
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// USER_PINS
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PD_7, // USER3
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PB_9, // USER1
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PE_0, // USER2
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PB_4, // USER4
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// USERKET
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PE_7, // USER_BUTTON
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// ENDSTOPS
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PD_8, // X_STOP
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PD_9, // Y_STOP
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PD_10, // Z_STOP
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PD_11, // U_STOP
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PA_8, // V_STOP
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PD_0, // W_STOP
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// HEATERS
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PD_13, // BED_HEAT_2
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PD_14, // BED_HEAT_1
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PD_15, // BED_HEAT_3
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PC_7, // E1_HEAT_PWM
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PB_0, // E2_HEAT_PWM
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PB_1, // E3_HEAT_PWM
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// THERMISTOR
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PC_2, // BED_THERMISTOR_1
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PC_3, // BED_THERMISTOR_2
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PA_3, // BED_THERMISTOR_3
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PA_0, // E1_THERMISTOR
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PA_1, // E2_THERMISTOR
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PA_2, // E3_THERMISTOR
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// FANS
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PC_4, // E1_FAN
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PC_5, // E2_FAN
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PE_8, // E3_FAN
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// X_MOTOR
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PE_13, // X_RESET
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PE_14, // X_PWM
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PE_15, // X_DIR
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// Y_MOTOR
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PE_10, // Y_RESET
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PB_10, // Y_PWM
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PE_9, // Y_DIR
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// Z_MOTOR
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PC_15, // Z_RESET
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PC_6, // Z_PWM
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PC_0, // Z_DIR
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// E1_MOTOR
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PC_14, // E1_RESET
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PC_13, // E1_DIR
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PD_12, // E1_PWM
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// E2_MOTOR
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PE_4, // E2_RESET
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PE_5, // E2_PWM
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PE_6, // E2_DIR
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// E3_MOTOR
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PE_3, // E3_RESET
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PE_2, // E3_DIR
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PB_8 // E3_PWM
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};
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#endif
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#ifdef __cplusplus
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}
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#endif
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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* System Clock source = PLL (HSI)
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* SYSCLK(Hz) = 84000000
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* HCLK(Hz) = 84000000
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* AHB Prescaler = 1
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* APB1 Prescaler = 2
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* APB2 Prescaler = 1
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* HSI Frequency(Hz) = 16000000
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* PLL_M = 16
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* PLL_N = 336
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* PLL_P = 4
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* PLL_Q = 7
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* VDD(V) = 3.3
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* Main regulator output voltage = Scale2 mode
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* Flash Latency(WS) = 2
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* @param None
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* @retval None
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*/
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WEAK void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/* Configure the main internal regulator output voltage */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
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/* Initializes the CPU, AHB and APB busses clocks */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 15;
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RCC_OscInitStruct.PLL.PLLN = 144;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
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RCC_OscInitStruct.PLL.PLLQ = 5;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/* Initializes the CPU, AHB and APB busses clocks */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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}
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#endif
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// PA_0 54 // E1_THERMISTOR
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// PA_1 55 // E2_THERMISTOR
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// PA_2 56 // E3_THERMISTOR
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// PA_3 53 // BED_THERMISTOR_3
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// PA_4 16 // SPI_CS
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// PA_5 17 // SPI_SCK
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// PA_6 18 // SPI_MISO
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// PA_7 19 // SPI_MOSI
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// PA_8 43 // V_STOP
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// PA_9 0 //TX
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// PA_10 1 //RX
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// PA_11 30 //OTG_DM
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// PA_12 31 //OTG_DP
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// PA_13 20 // JTAG_TMS/SWDIO
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// PA_14 21 // JTAG_TCK/SWCLK
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// PA_15 25 // SD_CARD_DETECT
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// PB_0 49 // E2_HEAT_PWM
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// PB_1 50 // E3_HEAT_PWM
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// PB_3 22 // JTAG_TDO/SWO
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// PB_4 37 // USER4
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// PB_5 6 // WIFI_WAKEUP
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// PB_6 15 // SCL
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// PB_7 14 // SDA
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// PB_8 77 // E3_PWM
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// PB_9 35 // USER1
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// PB_10 64 // Y_PWM
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// PB_12 10 // SPI_CS
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// PB_13 13 // SPI_SCK
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// PB_14 12 // SPI_MISO
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// PB_15 11 // SPI_MOSI
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// PC_0 68 // Z_DIR
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// PC_1 33 //IR_ON
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// PC_2 51 // BED_THERMISTOR_1
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// PC_3 52 // BED_THERMISTOR_2
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// PC_4 57 // E1_FAN
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// PC_5 58 // E2_FAN
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// PC_6 67 // Z_PWM
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// PC_7 48 // E1_HEAT_PWM
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// PC_8 23 // SDIO_D0
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// PC_9 24 // SDIO_D1
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// PC_10 26 // SDIO_D2
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// PC_11 27 // SDIO_D3
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// PC_12 28 // SDIO_CK
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// PC_13 70 // E1_DIR
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// PC_14 69 // E1_RESET
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// PC_15 66 // Z_RESET
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// PD_0 44 // W_STOP
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// PD_1 32 //IR_OUT
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// PD_2 29 // SDIO_CMD
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// PD_3 2 // CTS
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// PD_4 3 // RTS
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// PD_5 4 // TX
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// PD_6 5 // RX
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// PD_7 34 // USER3
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// PD_8 39 // X_STOP
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// PD_9 40 // Y_STOP
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// PD_10 41 // Z_STOP
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// PD_11 42 // U_STOP
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// PD_12 71 // E1_PWM
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// PD_13 45 // BED_HEAT_2
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// PD_14 46 // BED_HEAT_1
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// PD_15 47 // BED_HEAT_3
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// PE_0 36 // USER2
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// PE_1 9 // STATUS_LED
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// PE_2 76 // E3_DIR
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// PE_3 75 // E3_RESET
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// PE_4 72 // E2_RESET
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// PE_5 73 // E2_PWM
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// PE_6 74 // E2_DIR
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// PE_7 38 // USER_BUTTON
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// PE_8 59 // E3_FAN
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// PE_9 65 // Y_DIR
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// PE_10 63 // Y_RESET
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// PE_11 7 // WIFI_RESET
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// PE_12 8 // WIFI_BOOT
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// PE_13 60 // X_RESET
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// PE_14 61 // X_PWM
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// PE_15 62 // X_DIR
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