From 81bc428b48ffdbfaf7569b2daf5d48fdd0a40d43 Mon Sep 17 00:00:00 2001 From: Scott Lahteine Date: Sun, 19 Nov 2017 13:37:33 -0600 Subject: [PATCH] Don't compile custom u8g without DOGLCD --- .../u8g_dev_ssd1306_sh1106_128x64_I2C.cpp | 5 ++++ .../lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp | 8 ++++++- .../lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp | 6 +++++ .../dogm/ultralcd_st7920_u8glib_rrd_AVR.cpp | 24 +++++++++---------- 4 files changed, 30 insertions(+), 13 deletions(-) diff --git a/Marlin/src/lcd/dogm/u8g_dev_ssd1306_sh1106_128x64_I2C.cpp b/Marlin/src/lcd/dogm/u8g_dev_ssd1306_sh1106_128x64_I2C.cpp index c17f3e5be..040d19541 100644 --- a/Marlin/src/lcd/dogm/u8g_dev_ssd1306_sh1106_128x64_I2C.cpp +++ b/Marlin/src/lcd/dogm/u8g_dev_ssd1306_sh1106_128x64_I2C.cpp @@ -69,6 +69,10 @@ * beginning. */ +#include "../../inc/MarlinConfig.h" + +#if ENABLED(DOGLCD) + #include #include "HAL_LCD_com_defines.h" @@ -308,3 +312,4 @@ uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_s return 1; } +#endif // DOGLCD diff --git a/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp b/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp index 0bd87ae20..891db0077 100644 --- a/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp +++ b/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp @@ -57,6 +57,10 @@ */ +#include "../../inc/MarlinConfig.h" + +#if ENABLED(DOGLCD) + #include #include "HAL_LCD_com_defines.h" @@ -226,4 +230,6 @@ u8g_dev_t u8g_dev_st7565_64128n_HAL_2x_sw_spi = { u8g_dev_st7565_64128n_HAL_2x_f U8G_PB_DEV(u8g_dev_st7565_64128n_HAL_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_64128n_HAL_fn, U8G_COM_HAL_HW_SPI_FN); -u8g_dev_t u8g_dev_st7565_64128n_HAL_2x_hw_spi = { u8g_dev_st7565_64128n_HAL_2x_fn, &u8g_dev_st7565_64128n_HAL_2x_pb, U8G_COM_HAL_HW_SPI_FN }; \ No newline at end of file +u8g_dev_t u8g_dev_st7565_64128n_HAL_2x_hw_spi = { u8g_dev_st7565_64128n_HAL_2x_fn, &u8g_dev_st7565_64128n_HAL_2x_pb, U8G_COM_HAL_HW_SPI_FN }; + +#endif // DOGLCD diff --git a/Marlin/src/lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp b/Marlin/src/lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp index c5efe5158..baafc2c43 100644 --- a/Marlin/src/lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp +++ b/Marlin/src/lcd/dogm/u8g_dev_st7920_128x64_HAL.cpp @@ -56,6 +56,10 @@ */ +#include "../../inc/MarlinConfig.h" + +#if ENABLED(DOGLCD) + #include #include "HAL_LCD_com_defines.h" @@ -200,3 +204,5 @@ u8g_dev_t u8g_dev_st7920_128x64_HAL_4x_hw_spi = { u8g_dev_st7920_128x64_HAL_4x_f // for the ST7920 for HAL systems no matter what is selected in ultralcd_impl_DOGM.h. u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = { u8g_dev_st7920_128x64_HAL_4x_fn, &u8g_dev_st7920_128x64_HAL_4x_pb, U8G_COM_ST7920_HAL_SW_SPI }; #endif + +#endif // DOGLCD diff --git a/Marlin/src/lcd/dogm/ultralcd_st7920_u8glib_rrd_AVR.cpp b/Marlin/src/lcd/dogm/ultralcd_st7920_u8glib_rrd_AVR.cpp index 66a21d133..967a9edde 100644 --- a/Marlin/src/lcd/dogm/ultralcd_st7920_u8glib_rrd_AVR.cpp +++ b/Marlin/src/lcd/dogm/ultralcd_st7920_u8glib_rrd_AVR.cpp @@ -23,9 +23,13 @@ // NOTE - the HAL version of the rrd device uses a generic ST7920 device. See the // file u8g_dev_st7920_128x64_HAL.cpp for the HAL version. +#include "../../inc/MarlinConfig.h" + +#if ENABLED(DOGLCD) + #ifndef U8G_HAL_LINKS -#include "../../Marlin.h" +//#include "../../Marlin.h" //#if ENABLED(U8GLIB_ST7920) //#if ( ENABLED(SHARED_SPI) || !ENABLED(SHARED_SPI) && (defined(LCD_PINS_D4) && LCD_PINS_D4 >= 0) && (defined(LCD_PINS_ENABLE) && LCD_PINS_ENABLE >= 0)) @@ -97,18 +101,15 @@ #define U8G_DELAY() u8g_10MicroDelay() #endif - - static void ST7920_WRITE_BYTE(uint8_t val) { for (uint8_t i = 0; i < 8; i++) { WRITE(ST7920_DAT_PIN, val & 0x80); WRITE(ST7920_CLK_PIN, HIGH); WRITE(ST7920_CLK_PIN, LOW); - val = val << 1; + val <<= 1; } } - #define ST7920_SET_CMD() { ST7920_WRITE_BYTE(0xF8); U8G_DELAY(); } #define ST7920_SET_DAT() { ST7920_WRITE_BYTE(0xFA); U8G_DELAY(); } #define ST7920_WRITE_NIBBLES(a) { ST7920_WRITE_BYTE((uint8_t)((a)&0xF0u)); ST7920_WRITE_BYTE((uint8_t)((a)<<4u)); U8G_DELAY(); } @@ -118,17 +119,13 @@ static void ST7920_WRITE_BYTE(uint8_t val) { #define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); } #define ST7920_NCS() { WRITE(ST7920_CS_PIN,0); } - - uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { uint8_t i, y; switch (msg) { case U8G_DEV_MSG_INIT: { OUT_WRITE(ST7920_CS_PIN, LOW); - - - OUT_WRITE(ST7920_DAT_PIN, LOW); - OUT_WRITE(ST7920_CLK_PIN, LOW); + OUT_WRITE(ST7920_DAT_PIN, LOW); + OUT_WRITE(ST7920_CLK_PIN, LOW); ST7920_CS(); u8g_Delay(120); //initial delay for boot up @@ -197,4 +194,7 @@ u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = {u8g_dev_rrd_st7920_128x64_fn, &u8g //#endif //( ENABLED(SHARED_SPI) || !ENABLED(SHARED_SPI) && (defined(LCD_PINS_D4) && LCD_PINS_D4 >= 0) && (defined(LCD_PINS_ENABLE) && LCD_PINS_ENABLE >= 0)) //#endif // U8GLIB_ST7920 -#endif // AVR + +#endif // U8G_HAL_LINKS + +#endif // DOGLCD