diff --git a/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp b/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp
index fda5a79c9..8bc099cb7 100644
--- a/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp
+++ b/Marlin/src/lcd/dogm/u8g_dev_st7565_64128n_HAL.cpp
@@ -65,77 +65,90 @@
 #define HEIGHT 64
 #define PAGE_HEIGHT 8
 
+#define ST7565_ADC_REVERSE(N)    (0xA0 | ((N) & 0x1))
+#define ST7565_BIAS_MODE(N)      (0xA2 | ((N) & 0x1))
+#define ST7565_ALL_PIX(N)        (0xA4 | ((N) & 0x1))
+#define ST7565_INVERTED(N)       (0xA6 | ((N) & 0x1))
+#define ST7565_ON(N)             (0xAE | ((N) & 0x1))
+#define ST7565_OUT_MODE(N)       (0xC0 | ((N) & 0x1) << 3)
+#define ST7565_POWER_CONTROL(N)  (0x28 | (N))
+#define ST7565_V0_RATIO(N)       (0x20 | ((N) & 0x7))
+#define ST7565_CONTRAST(N)       (0x81), (N)
+
+#define ST7565_COLUMN_ADR(N)     (0x10 | ((N) >> 4) & 0xF), (0x00 | ((N) & 0xF))
+#define ST7565_PAGE_ADR(N)       (0xB0 | (N))
+#define ST7565_START_LINE(N)     (0x40 | (N))
+#define ST7565_SLEEP_MODE()      (0xAC)
+#define ST7565_NOOP()            (0xE3)
+
 /* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
 static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = {
-  U8G_ESC_CS(0),       // disable chip
-  U8G_ESC_ADR(0),     // instruction mode
-  U8G_ESC_CS(1),      // enable chip
-  U8G_ESC_RST(15),    // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
-
-  0x0A2,              // 0x0A2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
-  0x0A0,              // Normal ADC Select (according to Displaytech 64128N datasheet)
+  U8G_ESC_CS(0),              // disable chip
+  U8G_ESC_ADR(0),             // instruction mode
+  U8G_ESC_CS(1),              // enable chip
+  U8G_ESC_RST(15),            // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
 
-  0x0C8,              // common output mode: set scan direction normal operation/SHL Select, 0x0C0 --> SHL = 0, normal, 0x0C8 --> SHL = 1
-  0x040,              // Display start line for Displaytech 64128N
+  ST7565_BIAS_MODE(0),        // 0xA2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
+  ST7565_ADC_REVERSE(0),      // Normal ADC Select (according to Displaytech 64128N datasheet)
 
-  0x028 | 0x04,       // power control: turn on voltage converter
-  U8G_ESC_DLY(50),    // delay 50 ms
+  ST7565_OUT_MODE(1),         // common output mode: set scan direction normal operation/SHL Select, 0x0C0 --> SHL = 0, normal, 0x0C8 --> SHL = 1
+  ST7565_START_LINE(0),       // Display start line for Displaytech 64128N
 
-  0x028 | 0x06,       // power control: turn on voltage regulator
-  U8G_ESC_DLY(50),    // delay 50 ms
+  //0x028 | 0x04,             // power control: turn on voltage converter
+  //U8G_ESC_DLY(50),          // delay 50 ms
 
-  0x028 | 0x07,       // power control: turn on voltage follower
-  U8G_ESC_DLY(50),    // delay 50 ms
+  //0x028 | 0x06,             // power control: turn on voltage regulator
+  //U8G_ESC_DLY(50),          // delay 50 ms
 
-  0x010,              // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
+  ST7565_POWER_CONTROL(0x7),  // power control: turn on voltage follower
+  U8G_ESC_DLY(50),            // delay 50 ms
 
-  0x0A6,              // display normal, bit val 0: LCD pixel off.
+  ST7565_V0_RATIO(0),         // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
 
-  0x081,              // set contrast
-  0x01E,              // Contrast value. Setting for controlling brightness of Displaytech 64128N
+  ST7565_INVERTED(0),         // display normal, bit val 0: LCD pixel off.
 
+  ST7565_CONTRAST(0x1E),      // Contrast value. Setting for controlling brightness of Displaytech 64128N
 
-  0x0AF,              // display on
+  ST7565_ON(1),               // display on
 
-  U8G_ESC_DLY(100),   // delay 100 ms
-  0x0A5,              // display all points, ST7565
-  U8G_ESC_DLY(100),   // delay 100 ms
-  U8G_ESC_DLY(100),   // delay 100 ms
-  0x0A4,              // normal display
-  U8G_ESC_CS(0),      // disable chip
-  U8G_ESC_END         // end of sequence
+  U8G_ESC_DLY(100),           // delay 100 ms
+  ST7565_ALL_PIX(1),          // display all points, ST7565
+  U8G_ESC_DLY(100),           // delay 100 ms
+  U8G_ESC_DLY(100),           // delay 100 ms
+  ST7565_ALL_PIX(0),          // normal display
+  U8G_ESC_CS(0),              // disable chip
+  U8G_ESC_END                 // end of sequence
 };
 
 static const uint8_t u8g_dev_st7565_64128n_HAL_data_start[] PROGMEM = {
-  U8G_ESC_ADR(0),       // instruction mode
-  U8G_ESC_CS(1),        // enable chip
-  0x010,                // set upper 4 bit of the col adr to 0x10
-  0x000,                // set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N
-  U8G_ESC_END           // end of sequence
+  U8G_ESC_ADR(0),             // instruction mode
+  U8G_ESC_CS(1),              // enable chip
+  ST7565_COLUMN_ADR(0x00),    // high 4 bits to 0, low 4 bits to 0. Changed for DisplayTech 64128N
+  U8G_ESC_END                 // end of sequence
 };
 
 static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = {
-  U8G_ESC_ADR(0),       // instruction mode
-  U8G_ESC_CS(1),        // enable chip
-  0x0AC,                // static indicator off
-  0x000,                // indicator register set (not sure if this is required)
-  0x0AE,                // display off
-  0x0A5,                // all points on
-  U8G_ESC_CS(0),        // disable chip, bugfix 12 nov 2014
-  U8G_ESC_END           // end of sequence
+  U8G_ESC_ADR(0),             // instruction mode
+  U8G_ESC_CS(1),              // enable chip
+  ST7565_SLEEP_MODE(),        // static indicator off
+  //0x000,                    // indicator register set (not sure if this is required)
+  ST7565_ON(0),               // display off
+  ST7565_ALL_PIX(1),          // all points on
+  U8G_ESC_CS(0),              // disable chip, bugfix 12 nov 2014
+  U8G_ESC_END                 // end of sequence
   };
 
 static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_off[] PROGMEM = {
-  U8G_ESC_ADR(0),       // instruction mode
-  U8G_ESC_CS(1),        // enable chip
-  0x0A4,                // all points off
-  0x0AF,                // display on
-  U8G_ESC_DLY(50),      // delay 50 ms
-  U8G_ESC_CS(0),        // disable chip, bugfix 12 nov 2014
-  U8G_ESC_END           // end of sequence
+  U8G_ESC_ADR(0),             // instruction mode
+  U8G_ESC_CS(1),              // enable chip
+  ST7565_ALL_PIX(0),          // all points off
+  ST7565_ON(1),               // display on
+  U8G_ESC_DLY(50),            // delay 50 ms
+  U8G_ESC_CS(0),              // disable chip, bugfix 12 nov 2014
+  U8G_ESC_END                 // end of sequence
 };
 
-uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
+uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, const uint8_t msg, void *arg) {
   switch(msg) {
     case U8G_DEV_MSG_INIT:
       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
@@ -146,10 +159,9 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
     case U8G_DEV_MSG_PAGE_NEXT: {
         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
-        u8g_WriteByte(u8g, dev, 0x0B0 | pb->p.page); /* select current page (ST7565R) */
+        u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(pb->p.page)); /* select current page (ST7565R) */
         u8g_SetAddress(u8g, dev, 1);           /* data mode */
-        if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
-          return 0;
+        if (!u8g_pb_WriteBuffer(pb, u8g, dev)) return 0;
         u8g_SetChipSelect(u8g, dev, 0);
       }
       break;
@@ -170,7 +182,7 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
 }
 
-uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
+uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, const uint8_t msg, void *arg) {
   switch(msg) {
     case U8G_DEV_MSG_INIT:
       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
@@ -182,13 +194,13 @@ uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg,
         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
 
         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
-        u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page)); /* select current page (ST7565R) */
+        u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(2 * pb->p.page)); /* select current page (ST7565R) */
         u8g_SetAddress(u8g, dev, 1);           /* data mode */
         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf);
         u8g_SetChipSelect(u8g, dev, 0);
 
         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
-        u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
+        u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(2 * pb->p.page + 1)); /* select current page (ST7565R) */
         u8g_SetAddress(u8g, dev, 1);           /* data mode */
         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
         u8g_SetChipSelect(u8g, dev, 0);